Analysis and Synthesis March Memory Tests
V. N. Yarmolik (),
V. A. Levantsevich () and
D. V. Demenkovets ()
Digital Transformation, 2021, issue 2
Abstract:
The paper shows the relevance of testing storage devices in modern computing systems. Mathematical models of memory device faults and the efficiency of their detection, in particular, complex pattern sensitive faults of the PNPSFk type, based on classical march memory tests are presented. Limit estimates are given for the completeness of coverage of such faults depending on the number of memory cells involved in the fault. The necessity of synthesis of memory march tests characterized by high efficiency of PNPSFk failure detection is substantiated. The concept of a primitive providing conditions for activation and detection of various types of PNPSFk is defined. Examples of analysis and synthesis of memory march tests with different coverage of PNPSFk faults are given. The March OP memory test is synthesized, which is characterized by the maximum completeness of PNPSFk fault coverage and has the lowest time complexity compared to the known memory march tests, which provide the same comprehensiveness of coverage of complex memory device faults.
Date: 2021
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Persistent link: https://EconPapers.repec.org/RePEc:abx:journl:y:2021:id:612
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