Design of Modified RNS-PPA Based FIR Filter for High-Speed Application

Akarsha Yadav, Vijaya Prakash and Vidya Saraswathi
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Akarsha Yadav: Bangalore Institute of Technology, India.
Vijaya Prakash: Bangalore Institute of Technology, India.
Vidya Saraswathi: Bangalore Institute of Technology, India.

European Journal of Engineering and Technology Research, 2022, vol. 7, issue 5, 37-44

Abstract: The primary motive of this paper is to give the design and implementation of RNS (Residue Number System) based Area efficient and excessive-overall performance FIR filter of 4-tap, eight-tap, 16-tap of input eight bit. Additionally, RNS mathematics is a treasured device for theoretical research of the limits of fast mathematics. These proposed strategies additionally have a few additions operation, through the use of convention adder will decrease the speed of operation and additionally increase the number of logic gates. So, to conquer the one's issues we are using Ladner Fischer parallel prefix adder to lower the delay and area. First, the multiplier is designed through the use of RNS approach. In which the delay is decreased through 78.57% and power dissipation is likewise reduced to 64.65% for the RNS_PPA multiplier. A combination of those algorithms generates a brand-new structure of excessive speed and low implementation area in a single multiplier for FIR filter using Xilinx 14.7.

Keywords: FIR-Finite Impulse Response; PPA-Parallel Pre- Fix Adder; RNS-Residues Number System. (search for similar items in EconPapers)
Date: 2022
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Persistent link: https://EconPapers.repec.org/RePEc:epw:ejeng0:v:7:y:2022:i:5:id:62866

DOI: 10.24018/ejeng.2022.7.5.2866

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