Control-Loop-Based Impedance Enhancement of Grid-Tied Inverters for Harmonic Suppression: Principle and Implementation

Fei Wang, Lijun Zhang, Hui Guo and Xiayun Feng
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Fei Wang: College of Mechatronics Engineering and Automation, Shanghai University, Shanghai 200444, China
Lijun Zhang: College of Mechatronics Engineering and Automation, Shanghai University, Shanghai 200444, China
Hui Guo: College of Mechatronics Engineering and Automation, Shanghai University, Shanghai 200444, China
Xiayun Feng: College of Mechatronics Engineering and Automation, Shanghai University, Shanghai 200444, China

Energies, 2018, vol. 11, issue 11, 1-15

Abstract: To understand different control loops that have been proposed to improve the quality of current into grid from the perspective of output impedance, control-loop-based output impedance enhancement of grid-tied inverters for harmonic suppression is proposed in this paper. The principle and generalized control loop deduction are presented for reshaping the output impedance. Taking a traditional LCL (Inductor-Capacitor-Inductor)-type inverter with dual-loop control as an example, different kinds of control loop topologies are derived step by step and further optimized for the implementation of the proposed principle. Consequently, the improved control consists of a filtering-capacitor voltage loop, and a grid current loop is found which can remove the existing inner capacitor current loop and therefore simplify the control. Finally, the effectiveness of the proposed control method is compared with the existing method and both are verified by simulations and experiments.

Keywords: grid-tied inverter; harmonic suppression; impedance enhancement; output impedance (search for similar items in EconPapers)
JEL-codes: Q Q0 Q4 Q40 Q41 Q42 Q43 Q47 Q48 Q49 (search for similar items in EconPapers)
Date: 2018
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