A Novel Concept for Three-Phase Cascaded Multilevel Inverter Topologies

Md Mubashwar Hasan, A. Abu-Siada, Syed M. Islam and S. M. Muyeen
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Md Mubashwar Hasan: Department of Electrical and Computer Engineering, Curtin University, Perth, WA 6102, Australia
A. Abu-Siada: Department of Electrical and Computer Engineering, Curtin University, Perth, WA 6102, Australia
Syed M. Islam: Department of Electrical and Computer Engineering, Curtin University, Perth, WA 6102, Australia
S. M. Muyeen: Department of Electrical and Computer Engineering, Curtin University, Perth, WA 6102, Australia

Energies, 2018, vol. 11, issue 2, 1-16

Abstract: One of the key challenges in multilevel inverters (MLIs) design is to reduce the number of components used in the implementation while maximising the number of output voltage levels. This paper proposes a new concept that facilitates a device count reduction technique of existing cascaded MLIs. Moreover, the proposed concept can be utilised to extend existing single phase cascaded MLI topologies to three-phase structure without tripling the number of semiconductor components and input dc-supplies as per the current practice. The new generalized concept involves two stages; namely, cascaded stage and phase generator stage. The phase generator stage is a combination of a conventional three-phase two level inverter and three bi-directional switches while the cascaded stage can employ any existing cascaded topology. A laboratory prototype model is built and extensive experimental analyses are conducted to validate the feasibility of the proposed cascaded MLI concept.

Keywords: multilevel inverters; device counts reduction; cascaded inverter; conventional three-phase inverter (search for similar items in EconPapers)
JEL-codes: Q Q0 Q4 Q40 Q41 Q42 Q43 Q47 Q48 Q49 (search for similar items in EconPapers)
Date: 2018
References: View references in EconPapers View complete reference list from CitEc
Citations: View citations in EconPapers (2)

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