Implementation Strategy of Convolution Neural Networks on Field Programmable Gate Arrays for Appliance Classification Using the Voltage and Current (V-I) Trajectory

Darío Baptista, Sheikh Shanawaz Mostafa, Lucas Pereira, Leonel Sousa and Fernando Morgado-Dias
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Darío Baptista: Instituto Superior Tecnico, Universidade de Lisboa, 1649-001 Lisbon, Portugal
Sheikh Shanawaz Mostafa: Instituto Superior Tecnico, Universidade de Lisboa, 1649-001 Lisbon, Portugal
Lucas Pereira: M-ITI—Madeira Interactive Technologies Institute, 9020-105 Funchal, Portugal
Leonel Sousa: Instituto Superior Tecnico, Universidade de Lisboa, 1649-001 Lisbon, Portugal
Fernando Morgado-Dias: M-ITI—Madeira Interactive Technologies Institute, 9020-105 Funchal, Portugal

Energies, 2018, vol. 11, issue 9, 1-18

Abstract: Specific information about types of appliances and their use in a specific time window could help determining in details the electrical energy consumption information. However, conventional main power meters fail to provide any specific information. One of the best ways to solve these problems is through non-intrusive load monitoring, which is cheaper and easier to implement than other methods. However, developing a classifier for deducing what kind of appliances are used at home is a difficult assignment, because the system should identify the appliance as fast as possible with a higher degree of certainty. To achieve all these requirements, a convolution neural network implemented on hardware was used to identify the appliance through the voltage and current (V-I) trajectory. For the implementation on hardware, a field programmable gate array (FPGA) was used to exploit processing parallelism in order to achieve optimal performance. To validate the design, a publicly available Plug Load Appliance Identification Dataset (PLAID), constituted by 11 different appliances, has been used. The overall average F-score achieved using this classifier is 78.16% for the PLAID 1 dataset. The convolution neural network implemented on hardware has a processing time of approximately 5.7 ms and a power consumption of 1.868 W.

Keywords: non-intrusive load monitoring; convolution neural network; V-I trajectory; hardware classifier; FPGA (search for similar items in EconPapers)
JEL-codes: Q Q0 Q4 Q40 Q41 Q42 Q43 Q47 Q48 Q49 (search for similar items in EconPapers)
Date: 2018
References: View references in EconPapers View complete reference list from CitEc
Citations: View citations in EconPapers (5)

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