Leveraging Hybrid Filter for Improving Quasi-Type-1 Phase Locked Loop Targeting Fast Transient Response

Yunlu Li, Junyou Yang, Haixin Wang, Weichun Ge and Yiming Ma
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Yunlu Li: School of Electrical Engineering, Shenyang University of Technology, Shenyang 110870, China
Junyou Yang: School of Electrical Engineering, Shenyang University of Technology, Shenyang 110870, China
Haixin Wang: School of Electrical Engineering, Shenyang University of Technology, Shenyang 110870, China
Weichun Ge: Liaoning Province Electric Power Company, Shenyang 110006, China
Yiming Ma: School of Electrical Engineering, Shenyang University of Technology, Shenyang 110870, China

Energies, 2018, vol. 11, issue 9, 1-19

Abstract: In renewable energy generation applications, phase locked loop (PLL) is one of the most popular grid synchronization technique. The main objective of PLL is to rapidly and precisely extract phase and frequency especially when the grid voltage is under non-ideal conditions. This motivates the recent development of moving average filters (MAFs) based PLL in a quasi-type-1 system (i.e., QT1-PLL). Despite its success in certain applications, the transient response is still unsatisfactory, mainly due to the fact that the time delay caused by MAFs is still large. This has significantly limited the utilization of QT1-PLL, according to common grid codes such as German and Spanish grid codes. This challenge has been tackled in this paper. The basic idea is to develop a new hybrid filtering stage, consisting of adaptive notch filters (ANFs) and MAFs, arranged at the inner loop of QT1-PLL. Such an idea can greatly improve the transient response of QT1-PLL, owing to the fact that ANFs are utilized to remove the fundamental frequency negative voltage sequence (FFNS) component while other dominant harmonics can be removed by MAFs with a small time delay. By applying the proposed technique, the settling time is reduced to less than one cycle of grid frequency without any degradation in filtering capability. Moreover, the proposed PLL can be easily expanded to handle dc offset rejection. The effectiveness is validated by comprehensive experiments.

Keywords: synchronization; adaptive notch filter (ANF); phase-locked loop (PLL) (search for similar items in EconPapers)
JEL-codes: Q Q0 Q4 Q40 Q41 Q42 Q43 Q47 Q48 Q49 (search for similar items in EconPapers)
Date: 2018
References: View complete reference list from CitEc
Citations: View citations in EconPapers (3)

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