Direct Digital Design of PIDF Controllers with ComPlex Zeros for DC-DC Buck Converters

Stefania Cuoghi, Lorenzo Ntogramatzidis, Fabrizio Padula and Gabriele Grandi
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Stefania Cuoghi: School of Electrical Engineering, Computing and Mathematical Sciences, Curtin University, Bentley 6102, Western Australia, Australia
Lorenzo Ntogramatzidis: School of Electrical Engineering, Computing and Mathematical Sciences, Curtin University, Bentley 6102, Western Australia, Australia
Fabrizio Padula: School of Electrical Engineering, Computing and Mathematical Sciences, Curtin University, Bentley 6102, Western Australia, Australia
Gabriele Grandi: Department of Electrical, Electronic, and Information Engineering, University of Bologna, 40136 Bologna, Italy

Energies, 2018, vol. 12, issue 1, 1-21

Abstract: This paper presents a new direct digital design method for discrete proportional integral derivative PID + filter (PIDF) controllers employed in DC-DC buck converters. The considered controller structure results in a proper transfer function which has the advantage of being directly implementable by a microcontroller algorithm. Secondly, it can be written as an Infinite Impulse Response (IIR) digital filter. Thirdly, the further degree of freedom introduced by the low pass filter of the transfer function can be used to satisfy additional specifications. A new design procedure is proposed, which consists of the conjunction of the pole-zero cancellation method with an analytical design control methodology based on inversion formulae. These two methods are employed to reduce the negative effects introduced by the complex poles in the transfer function of the buck converter while exactly satisfying steady-state specifications on the tracking error and frequency domain requirements on the phase margin and on the gain crossover frequency. The proposed approach allows the designer to assign a closed-loop bandwidth without constraints imposed by the resonance frequency of the buck converter. The response under step variation of the reference value, and the disturbance rejection capability of the proposed control technique under load variations are also evaluated in real-time implementation by using the Arduino DUE board, and compared with other methods.

Keywords: buck converter; inversion formulae; phase margin; gain crossover frequency (search for similar items in EconPapers)
JEL-codes: Q Q0 Q4 Q40 Q41 Q42 Q43 Q47 Q48 Q49 (search for similar items in EconPapers)
Date: 2018
References: View complete reference list from CitEc
Citations: View citations in EconPapers (2)

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