Design and Development of Non-Isolated Modified SEPIC DC-DC Converter Topology for High-Step-Up Applications: Investigation and Hardware Implementation

Manoharan Premkumar, Umashankar Subramaniam, Hassan Haes Alhelou and Pierluigi Siano
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Manoharan Premkumar: Department of Electrical and Electronics Engineering, GMR Institute of Technology, Rajam, Andhra Pradesh 532127, India
Umashankar Subramaniam: Renewable Energy Laboratory, Prince Sultan University, Salahuddin, Riyadh 12435, Saudi Arabia
Hassan Haes Alhelou: Department of Electrical Power Engineering, Faculty of Mechanical and Electrical Engineering, Tishreen University, Lattakia 2230, Syria
Pierluigi Siano: Department of Management & Innovation Systems, University of Salerno, 84084 Fisciano, Italy

Energies, 2020, vol. 13, issue 15, 1-27

Abstract: A new non-isolated modified SEPIC front-end dc-dc converter for the low power system is proposed in this paper, and this converter is the next level of the traditional SEPIC converter with additional devices, such as two diodes and splitting of the output capacitor into two equal parts. The circuit topology proposed in this paper is formulated by combining the boost structure with the traditional SEPIC converter. Therefore, the proposed converter has the benefit of the SEPIC converter, such as continuous input current. The proposed circuit structure also improves the features, such as high voltage gain and high conversion efficiency. The converter comprises one MOSFET switch, one coupled inductor, three diodes, and two capacitors, including the output capacitor. The converter effectively recovers the leakage energy of the coupled inductor through the passive clamp circuit. The operation of the proposed converter is explained in continuous conduction mode (CCM) and discontinuous conduction mode (DCM). The required voltage gain of the converter can be acquired by adjusting the coupled inductor turn’s ratio along with the additional devices at less duty cycle of the switch. The simulation of the proposed converter under CCM is carried out, and an experimental prototype of 100 W, 25 V/200 V is made, and the experimental outcomes are presented to validate the theoretical discussions of the proposed converter. The operating performance of the proposed converter is compared with the converters discussed in the literature. The proposed converter can be extended by connecting voltage multiplier (VM) cell circuits to get the ultra-high voltage gain.

Keywords: clamp circuit; coupled inductor; high voltage gain; SEPIC converter; voltage stress (search for similar items in EconPapers)
JEL-codes: Q Q0 Q4 Q40 Q41 Q42 Q43 Q47 Q48 Q49 (search for similar items in EconPapers)
Date: 2020
References: View references in EconPapers View complete reference list from CitEc
Citations: View citations in EconPapers (3)

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