A Family of Transformerless Quadratic Boost High Gain DC-DC Converters

Mohammad Zaid, Chang-Hua Lin, Shahrukh Khan, Javed Ahmad, Mohd Tariq, Arshad Mahmood, Adil Sarwar, Basem Alamri and Ahmad Alahmadi
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Mohammad Zaid: Department of Electrical Engineering, ZHCET, Aligarh Muslim University, Aligarh 202002, India
Chang-Hua Lin: Department of Electrical Engineering, National Taiwan University of Science and Technology, Taipei City 10607, Taiwan
Shahrukh Khan: Department of Electrical Engineering, ZHCET, Aligarh Muslim University, Aligarh 202002, India
Javed Ahmad: Department of Electrical Engineering, National Taiwan University of Science and Technology, Taipei City 10607, Taiwan
Mohd Tariq: Department of Electrical Engineering, ZHCET, Aligarh Muslim University, Aligarh 202002, India
Arshad Mahmood: Department of Electrical Engineering, ZHCET, Aligarh Muslim University, Aligarh 202002, India
Adil Sarwar: Department of Electrical Engineering, ZHCET, Aligarh Muslim University, Aligarh 202002, India
Basem Alamri: Department of Electrical Engineering, College of Engineering, Taif University, Taif 21944, Saudi Arabia
Ahmad Alahmadi: Department of Electrical Engineering, College of Engineering, Taif University, Taif 21944, Saudi Arabia

Energies, 2021, vol. 14, issue 14, 1-25

Abstract: This paper presents three new and improved non-isolated topologies of quadratic boost converters (QBC). Reduced voltage stress across switching devices and high voltage gain with single switch operation are the main advantages of the proposed topologies. These topologies utilize voltage multiplier cells (VMC) made of switched capacitors and switched inductors to increase the converter’s voltage gain. The analysis in continuous conduction mode is discussed in detail. The proposed converter’s voltage gain is higher than the conventional quadratic boost converter, and other recently introduced boost converters. The proposed topologies utilize only a single switch and have continuous input current and low voltage stress across switch, capacitors, and diodes, which leads to the selection of low voltage rating components. The converter’s non-ideal voltage gain is also determined by considering the parasitic capacitance and ON state resistances of switch and diodes. The efficiency analysis incorporating switching and conduction losses of the switching and passive elements is done using PLECS software (Plexim, Zurich, Switzerland). The hardware prototype of the proposed converters is developed and tested for verification.

Keywords: voltage multiplier cell (VMC); quadratic boost; voltage stress; non-isolated (search for similar items in EconPapers)
JEL-codes: Q Q0 Q4 Q40 Q41 Q42 Q43 Q47 Q48 Q49 (search for similar items in EconPapers)
Date: 2021
References: View references in EconPapers View complete reference list from CitEc
Citations: View citations in EconPapers (3)

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