Secure Elliptic Curve Crypto-Processor for Real-Time IoT Applications

Stefano Di Matteo, Luca Baldanzi, Luca Crocetti, Pietro Nannipieri, Luca Fanucci and Sergio Saponara
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Stefano Di Matteo: Department of Information Engineering, University of Pisa, Via G. Caruso 16, 56122 Pisa, Italy
Luca Baldanzi: Department of Information Engineering, University of Pisa, Via G. Caruso 16, 56122 Pisa, Italy
Luca Crocetti: Department of Information Engineering, University of Pisa, Via G. Caruso 16, 56122 Pisa, Italy
Pietro Nannipieri: Department of Information Engineering, University of Pisa, Via G. Caruso 16, 56122 Pisa, Italy
Luca Fanucci: Department of Information Engineering, University of Pisa, Via G. Caruso 16, 56122 Pisa, Italy
Sergio Saponara: Department of Information Engineering, University of Pisa, Via G. Caruso 16, 56122 Pisa, Italy

Energies, 2021, vol. 14, issue 15, 1-20

Abstract: Cybersecurity is a critical issue for Real-Time IoT applications since high performance and low latencies are required, along with security requirements to protect the large number of attack surfaces to which IoT devices are exposed. Elliptic Curve Cryptography (ECC) is largely adopted in an IoT context to provide security services such as key-exchange and digital signature. For Real-Time IoT applications, hardware acceleration for ECC-based algorithms can be mandatory to meet low-latency and low-power/energy requirements. In this paper, we propose a fast and configurable hardware accelerator for NIST P-256/-521 elliptic curves, developed in the context of the European Processor Initiative. The proposed architecture supports the most used cryptography schemes based on ECC such as Elliptic Curve Digital Signature Algorithm (ECDSA), Elliptic Curve Integrated Encryption Scheme (ECIES), Elliptic Curve Diffie-Hellman (ECDH) and Elliptic Curve Menezes-Qu-Vanstone (ECMQV). A modified version of Double-And-Add-Always algorithm for Point Multiplication has been proposed, which allows the execution of Point Addition and Doubling operations concurrently and implements countermeasures against power and timing attacks. A simulated approach to extract power traces has been used to assess the effectiveness of the proposed algorithm compared to classical algorithms for Point Multiplication. A constant-time version of the Shamir’s Trick has been adopted to speed-up the Double-Point Multiplication and modular inversion is executed using Fermat’s Little Theorem, reusing the internal modular multipliers. The accelerator has been verified on a Xilinx ZCU106 development board and synthesized on both 45 nm and 7 nm Standard-Cell technologies.

Keywords: Elliptic Curve Cryptography; European Processor Initiative (EPI); cryptography; Real-Time; ASIC; 7 nm; FPGA; verification; side-channel (search for similar items in EconPapers)
JEL-codes: Q Q0 Q4 Q40 Q41 Q42 Q43 Q47 Q48 Q49 (search for similar items in EconPapers)
Date: 2021
References: View complete reference list from CitEc
Citations: View citations in EconPapers (1)

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