Variable Speed Drive DC-Bus Voltage Dip Proofing

Freeman Chiranga and Lesedi Masisi
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Freeman Chiranga: School of Electrical and Information Engineering, University of the Witwatersrand, Johannesburg 2000, South Africa
Lesedi Masisi: School of Electrical and Information Engineering, University of the Witwatersrand, Johannesburg 2000, South Africa

Energies, 2021, vol. 14, issue 24, 1-19

Abstract: This paper proposes a power electronic module that uses a switched capacitor for retaining the integrity of the dc-link voltage of a variable speed drive (VSD) during a 0.2 s short-term power interruption (STPI). Ride-through was achieved through switched capacitor onto the dc bus. However, this technique presents a challenge of the high inrush currents during a ride through compensation. In this work both analytical and experimental investigations were conducted in order to reduce the in-rush currents and its impact on the performance of the VSD during the STPI. Inrush peak currents were reduced by approximately 90%. Experimental results showed torque pulsations of 12.8% and 14.3% at the start and end of dc-link voltage compensation, respectively. A method for sizing the switched capacitor and the inrush limiting resistors is proposed. This methodology is based on the use of readily available nameplate information of the VSD and the electric motor. The proposed module can be retrofitted to existing VSDs that are based on v/f control.

Keywords: variable speed drive; short-term power interruption; ride-through; dc-link; inrush current; voltage compensation (search for similar items in EconPapers)
JEL-codes: Q Q0 Q4 Q40 Q41 Q42 Q43 Q47 Q48 Q49 (search for similar items in EconPapers)
Date: 2021
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