Sequential Switching Shunt Regulator Parallel Power Processing Control for High Capacitance Solar Arrays

José M. Blanes, José A. Carrasco, Ausiàs Garrigós, David Marroquí and Cristian Torres
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José M. Blanes: Industrial Electronics Group, Miguel Hernández University of Elche, 03202 Elche, Spain
José A. Carrasco: Industrial Electronics Group, Miguel Hernández University of Elche, 03202 Elche, Spain
Ausiàs Garrigós: Industrial Electronics Group, Miguel Hernández University of Elche, 03202 Elche, Spain
David Marroquí: Industrial Electronics Group, Miguel Hernández University of Elche, 03202 Elche, Spain
Cristian Torres: Industrial Electronics Group, Miguel Hernández University of Elche, 03202 Elche, Spain

Energies, 2021, vol. 14, issue 2, 1-13

Abstract: This paper presents a new control strategy for reducing the switching losses produced by the use of high parasitic capacitance solar arrays in the sequential switching shunt regulator. Instead of dividing the solar array into equal sections, the proposed strategy is based on two different sections types, low-capacitance and high-capacitance ones. In order to reduce the switching losses and to maintain the original closed-loop response, a novel parallel power processing control strategy is implemented. With this new technique the low-capacitance sections are the only ones that switch at high frequency to regulate the bus while the high-capacitance sections are only connected or disconnected under high load power changes. In addition, the control closed loop delay associated to the time needed to charge the parasitic capacitance has been modelled and a controller modification is proposed to reduce AC performance degradation.

Keywords: solar array regulator; sequential switch shunt regulator; solar array parasitic capacitance (search for similar items in EconPapers)
JEL-codes: Q Q0 Q4 Q40 Q41 Q42 Q43 Q47 Q48 Q49 (search for similar items in EconPapers)
Date: 2021
References: View complete reference list from CitEc
Citations: View citations in EconPapers (2)

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