Power Hardware-in-the-Loop: Response of Power Components in Real-Time Grid Simulation Environment

Moiz Muhammad, Holger Behrends, Stefan Geißendörfer, Karsten von Maydell and Carsten Agert
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Moiz Muhammad: German Aerospace Center (DLR)—Institute of Networked Energy Systems, Carl-von-Ossietzky Strasse, 26129 Oldenburg, Germany
Holger Behrends: German Aerospace Center (DLR)—Institute of Networked Energy Systems, Carl-von-Ossietzky Strasse, 26129 Oldenburg, Germany
Stefan Geißendörfer: German Aerospace Center (DLR)—Institute of Networked Energy Systems, Carl-von-Ossietzky Strasse, 26129 Oldenburg, Germany
Karsten von Maydell: German Aerospace Center (DLR)—Institute of Networked Energy Systems, Carl-von-Ossietzky Strasse, 26129 Oldenburg, Germany
Carsten Agert: German Aerospace Center (DLR)—Institute of Networked Energy Systems, Carl-von-Ossietzky Strasse, 26129 Oldenburg, Germany

Energies, 2021, vol. 14, issue 3, 1-20

Abstract: With increasing changes in the contemporary energy system, it becomes essential to test the autonomous control strategies for distributed energy resources in a controlled environment to investigate power grid stability. Power hardware-in-the-loop (PHIL) concept is an efficient approach for such evaluations in which a virtually simulated power grid is interfaced to a real hardware device. This strongly coupled software-hardware system introduces obstacles that need attention for smooth operation of the laboratory setup to validate robust control algorithms for decentralized grids. This paper presents a novel methodology and its implementation to develop a test-bench for a real-time PHIL simulation of a typical power distribution grid to study the dynamic behavior of the real power components in connection with the simulated grid. The application of hybrid simulation in a single software environment is realized to model the power grid which obviates the need to simulate the complete grid with a lower discretized sample-time. As an outcome, an environment is established interconnecting the virtual model to the real-world devices. The inaccuracies linked to the power components are examined at length and consequently a suitable compensation strategy is devised to improve the performance of the hardware under test (HUT). Finally, the compensation strategy is also validated through a simulation scenario.

Keywords: power hardware-in-the-loop (PHIL); power interface (PI); hardware under test (HUT); hybrid simulation; real-time simulator (RTS) (search for similar items in EconPapers)
JEL-codes: Q Q0 Q4 Q40 Q41 Q42 Q43 Q47 Q48 Q49 (search for similar items in EconPapers)
Date: 2021
References: View references in EconPapers View complete reference list from CitEc
Citations: View citations in EconPapers (4)

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