Open Circuit Fault Mitigation in a Nine-Level Modified Packed E-Cell Inverter

Shoeb Ahmad Khan, Adil Sarwar (), Mohd Tariq (), Shabana Urooj and Md Alamgir Hossain
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Shoeb Ahmad Khan: Department of Electrical Engineering, ZHCET, Aligarh Muslim University, Aligarh 202002, Uttar Pradesh, India
Adil Sarwar: Department of Electrical Engineering, ZHCET, Aligarh Muslim University, Aligarh 202002, Uttar Pradesh, India
Mohd Tariq: Department of Electrical Engineering, ZHCET, Aligarh Muslim University, Aligarh 202002, Uttar Pradesh, India
Shabana Urooj: Department of Electrical Engineering, College of Engineering, Princess Nourah Bint Abdulrahman University, P.O. Box 84428, Riyadh 11671, Saudi Arabia
Md Alamgir Hossain: Queensland Micro and Nanotechnology Centre, Griffith University, Nathan, QLD 4111, Australia

Energies, 2022, vol. 15, issue 21, 1-20

Abstract: Reliability of the multilevel inverters (MLIs) is one of the most important concerns in industrial applications, mainly due to the semiconductor devices. Whenever a fault occurs in one of the switches of the inverter, it leads to abnormal conditions and can also cause serious damage to the equipment connected to the multilevel inverter. In this paper, a recently proposed nine-level Packed-E-Cell (PEC) multilevel inverter topology is investigated for its fault-tolerant capability and improved reliability. The analysis is carried out for a reduced device multilevel inverter topology that, due to a lack of redundant states, cannot tolerate switch failures. The fault-tolerant (FT) topology provides additional redundant states in the switching sequence of the existing topology. The work in this paper presents Packed-E-Cell MLI modified for fault tolerance against single-switch open-circuit faults. The modified FT topology inherently achieves self-voltage balance in the DC-link capacitors. Nearest Level Control(NLC) is used as the modulation strategy for generating the desired switching pulses. Simulation results are obtained in MATLAB/Simulink for the conditions prior to the fault, during the fault and post fault, and results are discussed. Experimental verification of the modified FT topology is also performed, in order to validate its effectiveness.

Keywords: multilevel inverter (MLI); fault tolerance; modulation index; total harmonic distortion (search for similar items in EconPapers)
JEL-codes: Q Q0 Q4 Q40 Q41 Q42 Q43 Q47 Q48 Q49 (search for similar items in EconPapers)
Date: 2022
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