Single-Phase Fault Tolerant Multilevel Inverter Topologies—Comprehensive Review and Novel Comparative Factors

Haroon Rehman, Mohd Tariq (), Adil Sarwar (), Waleed Alhosaini, Md Alamgir Hossain and Salem Mohammed Batiyah
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Haroon Rehman: Department of Electrical Engineering, ZHCET, Aligarh Muslim University, Aligarh 202002, India
Mohd Tariq: Department of Electrical Engineering, ZHCET, Aligarh Muslim University, Aligarh 202002, India
Adil Sarwar: Department of Electrical Engineering, ZHCET, Aligarh Muslim University, Aligarh 202002, India
Waleed Alhosaini: Department of Electrical Engineering, College of Engineering, Jouf University, Sakaka 72341, Saudi Arabia
Md Alamgir Hossain: Queensland Micro and Nanotechnology Centre, Griffith University, Nathan, QLD 4111, Australia
Salem Mohammed Batiyah: Department of Electrical and Electronics Engineering, Yanbu Industrial College, Al Kulliyyah, Yanbu 46452, Saudi Arabia

Energies, 2022, vol. 15, issue 24, 1-52

Abstract: Multilevel inverters (MLIs) are used in a variety of industrial applications in high- and medium-voltage systems. The modularity, high-power output from medium voltages, and low harmonic content are some of the advantages of MLIs. The reliability of MLIs is quite important. The reliability is affected by different kinds of faults occurring in the MLIs. In MLI circuits, switching devices are the most vulnerable components and have a major involvement in all types of faults. As an outcome, it is necessary to take proper corrective action in the event of a fault. This work provides a comprehensive review of different fault tolerant (FT) solutions for MLIs in the event of switch fault. Moreover, various single-phase FT MLI topologies are reviewed, along with their constructional features, merits, and demerits. This work also proposes a comparison approach that integrates novel factors to account for fault tolerance quantitatively. A comparison investigation verifies the effectiveness of the proposed method. The FT operation of an existing five-level FT MLI topology is discussed, simulated, and experimentally verified.

Keywords: fault tolerant; fault-tolerant multilevel inverter; reduced device count; multilevel inverter; fault tolerance; inverters; switch faults; topology; reliability (search for similar items in EconPapers)
JEL-codes: Q Q0 Q4 Q40 Q41 Q42 Q43 Q47 Q48 Q49 (search for similar items in EconPapers)
Date: 2022
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