Overview of Signal Processing Problems in Power Electronic Control Circuits

Krzysztof Sozański ()
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Krzysztof Sozański: Institute of Automation, Electronics and Electrical Engineering, University of Zielona Góra, ul. Szafrana 9, 65-516 Zielona Góra, Poland

Energies, 2023, vol. 16, issue 12, 1-26

Abstract: This paper examines various aspects related to digital signal processing in digital control circuits used in power electronics. The discussion focuses on several common issues, including the sampling rate of signals (including phenomena such as aliasing and synchronization), coherent sampling, jitter of sampling pulses, sequential versus simultaneous sampling in multichannel systems, signal resolution (including signal-to-noise ratio, noise-shaping circuits, and changes in sampling speed), interpolation and decimation, and the conversion of analog circuits into digital form. One of the key contributions of this paper is the introduction of a new formula for calculating the resultant signal-to-noise ratio for three-stage digital control circuits. By carefully considering and correcting for sources of error, it is possible to increase the signal-to-noise ratio and minimize distortion components. This, in turn, leads to improved output/input current and voltage parameters, which can have a positive impact on the overall quality of energy processing in power electronic circuits.

Keywords: power electronic circuits; digital signal processing; signal-to-noise ratio (SNR); signal sampling (search for similar items in EconPapers)
JEL-codes: Q Q0 Q4 Q40 Q41 Q42 Q43 Q47 Q48 Q49 (search for similar items in EconPapers)
Date: 2023
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