Influence of Parasitic Elements and Operating Conditions of Semiconductor Switches on Power Losses and the Junction Temperature of These Switches

Krzysztof Górecki ()
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Krzysztof Górecki: Department of Marine Electronics, Gdynia Maritime University, Morska 81-87, 81-225 Gdynia, Poland

Energies, 2023, vol. 16, issue 15, 1-21

Abstract: This article presents the results of computer analysis of selected switching networks. In these analyses, the influence of selected parasitic components of electronic switches on the total and active power losses in these switches is considered. Analyses are performed using the SPICE software for two models of semiconductor switches: an ideal switch with RC parasitic components and the SPICE model of an IGBT. The influence of parasitic capacitances and resistances of these devices operating with the control signal of different parameters values on the total and active power dissipated in these switches is analyzed. On the basis of the obtained computations the average and peak-to-peak values of the junction temperature of electronic switches at the steady state are calculated using a compact thermal model. It is shown that parasitic elements visibly influence waveforms of the active and total power. It is proved that the simplified model using the total power in computations of the junction temperature makes it possible to obtain a high accuracy of computations only in a situation when the transistor operates with a resistive load. For an inductive load, such simplification can cause an unacceptably high computation error exceeding even 30%. Such an error is a result of big differences between the active and total powers during switching-on and switching-off processes.

Keywords: DC–DC converters; self-heating; power semiconductor devices; power losses; junction temperature; parasitic capacitances; parasitic resistances (search for similar items in EconPapers)
JEL-codes: Q Q0 Q4 Q40 Q41 Q42 Q43 Q47 Q48 Q49 (search for similar items in EconPapers)
Date: 2023
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