A Study on the Distributed-Control Architecture of a DSP-Based Solid-State Transformer System with Implementation

Jiho Ju, Dongho Choi and June-Seok Lee ()
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Jiho Ju: School of Electronic and Electrical Engineering, Dankook University, Yong-In 16890, Republic of Korea
Dongho Choi: School of Electronic and Electrical Engineering, Dankook University, Yong-In 16890, Republic of Korea
June-Seok Lee: School of Electronic and Electrical Engineering, Dankook University, Yong-In 16890, Republic of Korea

Energies, 2023, vol. 16, issue 16, 1-18

Abstract: This article proposes a Distributed-control Architecture (D-CA) and an operation sequence with start-up strategies for a Digital Signal Processor (DSP)-based Solid-State Transformer (SST). Although various control techniques for SSTs have been reported in earlier studies, there is still a lack of research covering comprehensive content, including hierarchical control architectures and operation sequences with start-ups considering the implementation of DSPs. Therefore, this article addresses the following factors of SST. First, the D-CA is described for the design of the hierarchy between control boards. With the D-CA, because sub-boards are in charge of their corresponding DC-link voltage balancing control individually, the computational burden on the master board can be reduced. Second, the operation sequence of the SST system is explained based on the SST with D-CA. The step of DC-link voltage balance is considered throughout the entire operation sequence for safe driving. Furthermore, the PWM start-up strategies for a Cascade H-bridge Multilevel (CHM) converter and Dual Active Bridge (DAB) converter are proposed to prevent switching pulse errors caused by DSP operating characteristics. These start-up strategies reduce the current surges. The validity of the proposed D-CA and operation sequence with start-up strategies are verified by experimental results.

Keywords: Solid-State Transformer (SST); Cascade H-bridge Multilevel (CHM) converter; Dual Active Bridge (DAB) converter; hierarchical control architecture; operation sequence; start-up strategy; Digital Signal Processor (DSP) (search for similar items in EconPapers)
JEL-codes: Q Q0 Q4 Q40 Q41 Q42 Q43 Q47 Q48 Q49 (search for similar items in EconPapers)
Date: 2023
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