Electrically Active Defects in SiC Power MOSFETs

Mayank Chaturvedi, Daniel Haasmann, Hamid Amini Moghadam and Sima Dimitrijev ()
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Mayank Chaturvedi: Queensland Micro- and Nanotechnology Centre, Griffith University, Brisbane, QLD 4111, Australia
Daniel Haasmann: Queensland Micro- and Nanotechnology Centre, Griffith University, Brisbane, QLD 4111, Australia
Hamid Amini Moghadam: Queensland Micro- and Nanotechnology Centre, Griffith University, Brisbane, QLD 4111, Australia
Sima Dimitrijev: Queensland Micro- and Nanotechnology Centre, Griffith University, Brisbane, QLD 4111, Australia

Energies, 2023, vol. 16, issue 4, 1-16

Abstract: The performance and reliability of the state-of-the-art power 4H-SiC metal–oxide–semiconductor field-effect transistors (MOSFETs) are affected by electrically active defects at and near the interface between SiC and the gate dielectric. Specifically, these defects impact the channel-carrier mobility and threshold voltage of SiC MOSFETs, depending on their physical location and energy levels. To characterize these defects, techniques have evolved from those used for Si devices to techniques exclusively designed for the SiC MOS structure and SiC MOSFETs. This paper reviews the electrically active defects at and near the interface between SiC and the gate dielectric in SiC power MOSFETs and MOS capacitors. First, the defects are classified according to their physical locations and energy positions into (1) interface traps, (2) near interface traps with energy levels aligned to the energy gap, and (3) near-interface traps with energy levels aligned to the conduction band of SiC. Then, representative published results are shown and discussed for each class of defect.

Keywords: 4H-SiC; interface traps; near-interface traps; SiC power MOSFET (search for similar items in EconPapers)
JEL-codes: Q Q0 Q4 Q40 Q41 Q42 Q43 Q47 Q48 Q49 (search for similar items in EconPapers)
Date: 2023
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