Switched Capacitor Inverter with Reduced Inrush Current and High Boosting Gain

Ankita Choudhary, Ashutosh Kumar Singh, Rajib Kumar Mandal and Akshay Kumar Saha ()
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Ankita Choudhary: Department of Electrical Engineering, National Institute of Technology Patna, Patna 800005, Bihar, India
Ashutosh Kumar Singh: Department of Electrical Engineering, National Institute of Technology Patna, Patna 800005, Bihar, India
Rajib Kumar Mandal: Department of Electrical Engineering, National Institute of Technology Patna, Patna 800005, Bihar, India
Akshay Kumar Saha: Discipline of Electrical, Electronic and Computer Engineering, University of KwaZulu-Natal, Glenwood, Durban 4041, South Africa

Energies, 2024, vol. 17, issue 13, 1-21

Abstract: This article describes a 17-level switched-capacitor-based eight-times-boosting gain inverter. The inverter is made up of a DC power source, thirteen switches, three diodes, and three capacitors. The inverter produces seventeen steps during each cycle and crosses the zero line two times in one complete cycle. The proposed inverter has its polarity change mechanism; it is not necessary to use an H-bridge. Three self-balancing capacitors make up this construction. The capacitors automatically balance voltage by connecting in series/parallel to the input voltage source. Logic gates can generate gate pulses with the phase disposition pulse-width modulation technique, which helps to preserve capacitor voltage balance at the same time. The proposed structure was compared to recent papers, analyzing factors including voltage gain, DC sources, semiconductor devices, cost function, and TSV. The proposed configuration offers cost effectiveness and fewer semiconductor devices for providing a 17-level output with sufficient voltage gain. Also, to reduce the capacitor inrush current, soft charging is used. Additionally, the proposed structure’s power losses were examined, confirming its efficiency. Finally, an experimental prototype was tested to analyze and validate the suggested structure’s performance under various situations. Results show the proposed structure performs well under steady and dynamic situations.

Keywords: voltage boosting; multi-level inverter; voltage balance; switched capacitor; total standing voltage (search for similar items in EconPapers)
JEL-codes: Q Q0 Q4 Q40 Q41 Q42 Q43 Q47 Q48 Q49 (search for similar items in EconPapers)
Date: 2024
References: View references in EconPapers View complete reference list from CitEc
Citations: View citations in EconPapers (1)

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