Modeling and Controller Design of PV Micro Inverter without Using Electrolytic Capacitors and Input Current Sensors

Faa Jeng Lin, Hsuang Chang Chiang and Jin Kuan Chang
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Faa Jeng Lin: Department of Electrical Engineering, National Central University, Taoyuan 32001, Taiwan
Hsuang Chang Chiang: Department of Electrical Engineering, National United University, Miaoli 360, Taiwan
Jin Kuan Chang: Department of Electrical Engineering, National Central University, Taoyuan 32001, Taiwan

Energies, 2016, vol. 9, issue 12, 1-17

Abstract: This paper outlines the modeling and controller design of a novel two-stage photovoltaic (PV) micro inverter (MI) that eliminates the need for an electrolytic capacitor (E-cap) and input current sensor. The proposed MI uses an active-clamped current-fed push-pull DC-DC converter, cascaded with a full-bridge inverter. Three strategies are proposed to cope with the inherent limitations of a two-stage PV MI: (i) high-speed DC bus voltage regulation using an integrator to deal with the 2nd harmonic voltage ripples found in single-phase systems; (ii) inclusion of a small film capacitor in the DC bus to achieve ripple-free PV voltage; (iii) improved incremental conductance (INC) maximum power point tracking (MPPT) without the need for current sensing by the PV module. Simulation and experimental results demonstrate the efficacy of the proposed system.

Keywords: ripple voltage cancellation technique; input current; sensorless; incremental conductance maximum power point tracking; active-clamped current-fed push-pull DC-DC converter (search for similar items in EconPapers)
JEL-codes: Q Q0 Q4 Q40 Q41 Q42 Q43 Q47 Q48 Q49 (search for similar items in EconPapers)
Date: 2016
References: View complete reference list from CitEc
Citations: View citations in EconPapers (2)

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