A Unified PUF and Crypto Core Exploiting the Metastability in Latches

Ronaldo Serrano (), Ckristian Duran, Marco Sarmiento, Tuan-Kiet Dang, Trong-Thuc Hoang and Cong-Kha Pham
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Ronaldo Serrano: Department of Computer and Network Engineering, The University of Electro-Communications (UEC), Tokyo 182-8585, Japan
Ckristian Duran: Department of Computer and Network Engineering, The University of Electro-Communications (UEC), Tokyo 182-8585, Japan
Marco Sarmiento: Department of Computer and Network Engineering, The University of Electro-Communications (UEC), Tokyo 182-8585, Japan
Tuan-Kiet Dang: Department of Computer and Network Engineering, The University of Electro-Communications (UEC), Tokyo 182-8585, Japan
Trong-Thuc Hoang: Department of Computer and Network Engineering, The University of Electro-Communications (UEC), Tokyo 182-8585, Japan
Cong-Kha Pham: Department of Computer and Network Engineering, The University of Electro-Communications (UEC), Tokyo 182-8585, Japan

Future Internet, 2022, vol. 14, issue 10, 1-12

Abstract: Hardware acceleration of cryptography algorithms represents an emerging approach to obtain benefits in terms of speed and side-channel resistance compared to software implementations. In addition, a hardware implementation can provide the possibility of unifying the functionality with some secure primitive, for example, a true random number generator (TRNG) or a physical unclonable function (PUF). This paper presents a unified PUF-ChaCha20 in a field-programmable gate-array (FPGA) implementation. The problems and solutions of the PUF implementation are described, exploiting the metastability in latches. The Xilinx Artix-7 XC7A100TCSG324-1 FPGA implementation occupies 2416 look-up tables (LUTs) and 1026 flips-flops (FFs), reporting a 3.11% area overhead. The PUF exhibits values of 49.15%, 47.52%, and 99.25% for the average uniformity, uniqueness, and reliability, respectively. Finally, ChaCha20 reports a speed of 0.343 cycles per bit with the unified implementation.

Keywords: ChaCha20; PUF; RISC-V (search for similar items in EconPapers)
JEL-codes: O3 (search for similar items in EconPapers)
Date: 2022
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