A New Hybrid Synchronization PLL Scheme for Interconnecting Renewable Energy Sources to an Abnormal Electric Grid

Mansoor Alturki, Rabeh Abbassi, Abdullah Albaker and Houssem Jerbi
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Mansoor Alturki: Department of Electrical Engineering, College of Engineering, University of Ha’il, Ha’il 81451, Saudi Arabia
Rabeh Abbassi: Department of Electrical Engineering, College of Engineering, University of Ha’il, Ha’il 81451, Saudi Arabia
Abdullah Albaker: Department of Electrical Engineering, College of Engineering, University of Ha’il, Ha’il 81451, Saudi Arabia
Houssem Jerbi: Department of Industrical Engineering, College of Engineering, University of Ha’il, Ha’il 81451, Saudi Arabia

Mathematics, 2022, vol. 10, issue 7, 1-21

Abstract: Today, and especially with the growing interest in distributed renewable energy sources (DRESs), modern electric power systems are becoming more and more complex. In order to increase DRES penetration, grid side converter (GSC) control techniques require appropriate synchronization algorithms that are able to detect the grid voltage status as fast and accurately as possible. The drawbacks of the published synchronization phase-locked loop (PLL) techniques were structured mainly around the slow dynamic responses, the inaccuracy of extracting the fundamental components of the grid voltages when they contain a DC offset, and the worsening of the imbalance rejection ability facing significant frequency changing. This paper proposes a new synchronization PLL technique ensuring efficient and reliable integration of DRESs under normal, abnormal, and harmonically distorted grid conditions. The proposed PLL uses the mixed second- and third-order generalized integrator (MSTOGI) in the prefiltering stage through its adaptability to power quality and numerous grid conditions and its low sensitivity to input DC and inter-harmonics. Moreover, a modified quasi type-1 PLL (MQT1-PLL), which integrates two compensation blocks for phase and amplitude errors, respectively, has been used in the control loop. The discussion of sizing requirements and the effectiveness of the so-called MSTOGI-MQT1-PLL are tested under grid voltage imbalances and distortions and confirmed through simulation results compared to double second-order generalized integrator PLL (DSOGI-PLL), cascaded delayed signal cancellation PLL (CDSC-PLL), and multiple delayed-signal cancellation PLL (MDSC-PLL).

Keywords: synchronization; phase locked loop (PLL); mixed second- and third-order generalized integrator (MSTOGI); delayed-signal cancellation (DSC); moving average filter (MAF); distorted grid conditions; MQT1-PLL (search for similar items in EconPapers)
JEL-codes: C (search for similar items in EconPapers)
Date: 2022
References: View references in EconPapers View complete reference list from CitEc
Citations: View citations in EconPapers (3)

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