A Novel High-Speed and Low-PDP Approximate Full Adder Cell for Image Blending
Seyed Hossein Shahrokhi,
Mehdi Hosseinzadeh (),
Midia Reshadi and
Saeid Gorgin
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Seyed Hossein Shahrokhi: Department of Computer Engineering, Science and Research Branch, Islamic Azad University (SRBIAU), Tehran 1477893855, Iran
Mehdi Hosseinzadeh: Institute of Research and Development, Duy Tan University, Da Nang 550000, Vietnam
Midia Reshadi: Department of Computer Engineering, Science and Research Branch, Islamic Azad University (SRBIAU), Tehran 1477893855, Iran
Saeid Gorgin: Department of Electrical Engineering and Information Technology, Iranian Research Organization for Science and Technology (IROST), Tehran 3313193685, Iran
Mathematics, 2023, vol. 11, issue 12, 1-13
Abstract:
This paper presents a new and high-performance inaccurate Full Adder Cell utilizing the Carbon Nanotube Field Effect Transistor (CNFET) technology. Comprehensive simulations are performed at the transistor and application levels to justify the performance of our design. Simulations performed using the HSPICE tool confirm the significant improvement in the performance of the proposed circuit delay, power-delay product (PDP) and energy-delay product (EDP) compared to competitor designs. Additionally, via a MATLAB tool, the image blending (alpha blending) application uses inaccurate Full Adder cells. Software simulations confirm the suitable quality of the final images according to the image quality evaluation criteria.
Keywords: approximate; full adder; CNFET; alpha blending; high speed (search for similar items in EconPapers)
JEL-codes: C (search for similar items in EconPapers)
Date: 2023
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Persistent link: https://EconPapers.repec.org/RePEc:gam:jmathe:v:11:y:2023:i:12:p:2649-:d:1168040
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