An Adaptive Feed-Forward Phase Locked Loop for Grid Synchronization of Renewable Energy Systems under Wide Frequency Deviations

Aravind Chellachi Kathiresan, Jeyaraj PandiaRajan, Asokan Sivaprakash, Thanikanti Sudhakar Babu and Md. Rabiul Islam
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Aravind Chellachi Kathiresan: Department of Electrical and Electronics Engineering, MepcoSchlenk Engineering College (Autonomous), Sivakasi 626005, India
Jeyaraj PandiaRajan: Department of Electrical and Electronics Engineering, MepcoSchlenk Engineering College (Autonomous), Sivakasi 626005, India
Asokan Sivaprakash: Department of Electrical and Electronics Engineering, MepcoSchlenk Engineering College (Autonomous), Sivakasi 626005, India
Thanikanti Sudhakar Babu: Institute of Power Engineering, Department of Electrical Power Engineering, Universiti Tenaga National, Kajang 43000, Malaysia
Md. Rabiul Islam: School of Electrical, Computer and Telecommunications Engineering, University of Wollongong, Wollongong, NSW 2522, Australia

Sustainability, 2020, vol. 12, issue 17, 1-15

Abstract: Synchronization is a crucial problem in the grid-connected inverter’s control and operation. A phase-locked loop (PLL) is a typical grid synchronization strategy, which ought to have a high resistance to power system uncertainties since its sensitivity influences the generated reference signal. The traditional PLL catches the phase and frequency of the input signal via the feedback loop filter (LF). In general, to enhance the steady-state capability during distorted grid conditions generally, a filter tuned for nominal frequency is used. This PLL corrects large frequency deviations around the nominal frequency, which increases the PLL’s locking time. Therefore, this paper presents an adaptive feed-forward PLL, where the input signal frequency and phase under large frequency deviations are tracked precisely, which overcomes the above-mentioned limitations. The proposed adaptive PLL consists of a feedback loop that reduces the phase error. The feed-forward loop predicts the frequency and phase error, and the frequency adaptive FIR filter reduces the ripples in output, which is due to input distortions. The adaptive mechanism adjusts the gain of the filter in accordance with the supply frequency. This reduces the phase and frequency error and also decreases the locking time under wide frequency deviations. To verify the effectiveness of the proposed adaptive feed-forward PLL, the system was tested under different grid abnormal conditions. Further, the stability analysis has been carried out via a developed prototype test platform in the laboratory. To bring the proposed simulations into real-time implementations and for control strategies, an Altera Cyclone II field-programmable gate array (FPGA) board has been used. The obtained results of the proposed PLL via simulations and hardware are compared with conventional techniques, and it indicates the superiority of the proposed method. The proposed PLL effectively able to tackle the different grid uncertainties, which can be observed from the results presented in the result section.

Keywords: adaptive PLL; feed-forward PLL; grid synchronization; phase-locked loop (search for similar items in EconPapers)
JEL-codes: O13 Q Q0 Q2 Q3 Q5 Q56 (search for similar items in EconPapers)
Date: 2020
References: View references in EconPapers View complete reference list from CitEc
Citations: View citations in EconPapers (4)

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