 Multi-task parallel collaborative design based on SoC multi-core architectureXiaofu Zou, Yue Tang, Ying Zuo and Shicheng Zhan International Journal of Service and Computing Oriented Manufacturing, 2018, vol. 3, issue 2/3, 212-225 Abstract: The high efficiency is demanded in aerospace field. In the design of the control system, adopting single processor can hardly meet the demand of efficiency required. However processor array's hardware size and off-chip bus delay cannot be ignored. In order to solve the above mentioned problems, this paper is intended to study multi-task collaborative parallel design based on multi-core SOC (system on chip). Firstly, multi-core architecture based on SOC is achieved, which includes constructing two MicroBlaze cores, two ARM (advanced RISC machines) cores and designing inter-core communication, as well as designing external data collection and hardware acceleration unit based on FPGA (field programmable gate array). Secondly, collaborative parallel design in missile control system is studied. Finally, a verification platform is developed. By comparing with single core processor, it is proved that the approaches proposed have advantages over enhancing the efficiency. Keywords: multi-core; system on chip; SoC; multi-task; parallel; field programmable gate array; FPGA; advanced RISC machines; ARM. (search for similar items in EconPapers) Downloads: (external link) Related works: Export reference: BibTeX RIS (EndNote, ProCite, RefMan) HTML/Text Persistent link: https://EconPapers.repec.org/RePEc:ids:ijscom:v:3:y:2018:i:2/3:p:212-225 Access Statistics for this article More articles in International Journal of Service and Computing Oriented Manufacturing from Inderscience Enterprises Ltd |
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