Two-dimensional ferroelectric channel transistors integrating ultra-fast memory and neural computing
Shuiyuan Wang,
Lan Liu,
Lurong Gan,
Huawei Chen,
Xiang Hou,
Yi Ding,
Shunli Ma,
David Wei Zhang and
Peng Zhou ()
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Shuiyuan Wang: ASIC & System State Key Lab., School of Microelectronics, Fudan University
Lan Liu: ASIC & System State Key Lab., School of Microelectronics, Fudan University
Lurong Gan: ASIC & System State Key Lab., School of Microelectronics, Fudan University
Huawei Chen: ASIC & System State Key Lab., School of Microelectronics, Fudan University
Xiang Hou: ASIC & System State Key Lab., School of Microelectronics, Fudan University
Yi Ding: ASIC & System State Key Lab., School of Microelectronics, Fudan University
Shunli Ma: ASIC & System State Key Lab., School of Microelectronics, Fudan University
David Wei Zhang: ASIC & System State Key Lab., School of Microelectronics, Fudan University
Peng Zhou: ASIC & System State Key Lab., School of Microelectronics, Fudan University
Nature Communications, 2021, vol. 12, issue 1, 1-9
Abstract:
Abstract With the advent of the big data era, applications are more data-centric and energy efficiency issues caused by frequent data interactions, due to the physical separation of memory and computing, will become increasingly severe. Emerging technologies have been proposed to perform analog computing with memory to address the dilemma. Ferroelectric memory has become a promising technology due to field-driven fast switching and non-destructive readout, but endurance and miniaturization are limited. Here, we demonstrate the α-In2Se3 ferroelectric semiconductor channel device that integrates non-volatile memory and neural computation functions. Remarkable performance includes ultra-fast write speed of 40 ns, improved endurance through the internal electric field, flexible adjustment of neural plasticity, ultra-low energy consumption of 234/40 fJ per event for excitation/inhibition, and thermally modulated 94.74% high-precision iris recognition classification simulation. This prototypical demonstration lays the foundation for an integrated memory computing system with high density and energy efficiency.
Date: 2021
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Persistent link: https://EconPapers.repec.org/RePEc:nat:natcom:v:12:y:2021:i:1:d:10.1038_s41467-020-20257-2
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DOI: 10.1038/s41467-020-20257-2
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