Van der Waals engineering of ferroelectric heterostructures for long-retention memory

Xiaowei Wang, Chao Zhu, Ya Deng, Ruihuan Duan, Jieqiong Chen, Qingsheng Zeng, Jiadong Zhou, Qundong Fu, Lu You, Song Liu, James H. Edgar, Peng Yu and Zheng Liu ()
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Xiaowei Wang: Nanyang Technological University
Chao Zhu: Nanyang Technological University
Ya Deng: Nanyang Technological University
Ruihuan Duan: Nanyang Technological University
Jieqiong Chen: Nanyang Technological University
Qingsheng Zeng: Nanyang Technological University
Jiadong Zhou: Nanyang Technological University
Qundong Fu: Nanyang Technological University
Lu You: Soochow University
Song Liu: Durland Hall, Kansas State University
James H. Edgar: Durland Hall, Kansas State University
Peng Yu: Sun Yat-sen University
Zheng Liu: Nanyang Technological University

Nature Communications, 2021, vol. 12, issue 1, 1-8

Abstract: Abstract The limited memory retention for a ferroelectric field-effect transistor has prevented the commercialization of its nonvolatile memory potential using the commercially available ferroelectrics. Here, we show a long-retention ferroelectric transistor memory cell featuring a metal-ferroelectric-metal-insulator-semiconductor architecture built from all van der Waals single crystals. Our device exhibits 17 mV dec−1 operation, a memory window larger than 3.8 V, and program/erase ratio greater than 107. Thanks to the trap-free interfaces and the minimized depolarization effects via van der Waals engineering, more than 104 cycles endurance, a 10-year memory retention and sub-5 μs program/erase speed are achieved. A single pulse as short as 100 ns is enough for polarization reversal, and a 4-bit/cell operation of a van der Waals ferroelectric transistor is demonstrated under a 100 ns pulse train. These device characteristics suggest that van der Waals engineering is a promising direction to improve ferroelectronic memory performance and reliability for future applications.

Date: 2021
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DOI: 10.1038/s41467-021-21320-2

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