Self-rectifying resistive memory in passive crossbar arrays

Kanghyeok Jeon, Jeeson Kim, Jin Joo Ryu, Seung-Jong Yoo, Choongseok Song, Min Kyu Yang, Doo Seok Jeong () and Gun Hwan Kim ()
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Kanghyeok Jeon: Korea Research Institute of Chemical Technology (KRICT) 141 Gajeong-Ro, Yuseong-Gu
Jeeson Kim: Hanyang University
Jin Joo Ryu: Korea Research Institute of Chemical Technology (KRICT) 141 Gajeong-Ro, Yuseong-Gu
Seung-Jong Yoo: Korea Research Institute of Chemical Technology (KRICT) 141 Gajeong-Ro, Yuseong-Gu
Choongseok Song: Hanyang University
Min Kyu Yang: Sahmyook University
Doo Seok Jeong: Hanyang University
Gun Hwan Kim: Korea Research Institute of Chemical Technology (KRICT) 141 Gajeong-Ro, Yuseong-Gu

Nature Communications, 2021, vol. 12, issue 1, 1-15

Abstract: Abstract Conventional computing architectures are poor suited to the unique workload demands of deep learning, which has led to a surge in interest in memory-centric computing. Herein, a trilayer (Hf0.8Si0.2O2/Al2O3/Hf0.5Si0.5O2)-based self-rectifying resistive memory cell (SRMC) that exhibits (i) large selectivity (ca. 104), (ii) two-bit operation, (iii) low read power (4 and 0.8 nW for low and high resistance states, respectively), (iv) read latency ( 104 s at 85 °C), and (vi) complementary metal-oxide-semiconductor compatibility (maximum supply voltage ≤5 V) is introduced, which outperforms previously reported SRMCs. These characteristics render the SRMC highly suitable for the main memory for memory-centric computing which can improve deep learning acceleration. Furthermore, the low programming power (ca. 18 nW), latency (100 μs), and endurance (>106) highlight the energy-efficiency and highly reliable random-access memory of our SRMC. The feasible operation of individual SRMCs in passive crossbar arrays of different sizes (30 × 30, 160 × 160, and 320 × 320) is attributed to the large asymmetry and nonlinearity in the current-voltage behavior of the proposed SRMC, verifying its potential for application in large-scale and high-density non-volatile memory for memory-centric computing.

Date: 2021
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DOI: 10.1038/s41467-021-23180-2

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