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Super-resolution laser probing of integrated circuits using algorithmic methods

V. K. Ravikumar, Jiann Min Chin, Winson Lua, Nathan Linarto, Gopinath Ranganathan, Jonathan Trisno, K. L. Pey () and Joel K. W. Yang ()
Additional contact information
V. K. Ravikumar: Singapore University of Technology and Design
Jiann Min Chin: Advanced Micro Devices (Singapore) Pte Ltd
Winson Lua: Advanced Micro Devices (Singapore) Pte Ltd
Nathan Linarto: Advanced Micro Devices (Singapore) Pte Ltd
Gopinath Ranganathan: Advanced Micro Devices (Singapore) Pte Ltd
Jonathan Trisno: Singapore University of Technology and Design
K. L. Pey: Singapore University of Technology and Design
Joel K. W. Yang: Singapore University of Technology and Design

Nature Communications, 2022, vol. 13, issue 1, 1-8

Abstract: Abstract Laser probing remains invaluable to the semiconductor industry for isolating and diagnosing defects in silicon transistors in integrated circuits during electrical stress tests. However, continuous device miniaturization below the 20 nm technology node has crammed multiple transistors within the focal spot of the laser beam, resulting in signal crosstalk, poor beam positioning accuracy and degraded fault isolation capabilities. The challenge is analogous to focusing attention to a single speaker in a crowd despite the multiple simultaneous conversations in the background. Through algorithms introduced in this patented work, consisting of cross-correlations, clustering, and our previously developed combinational logic analysis, we achieved beam positioning accuracy to better than 10 nm, extracted electrooptic waveforms from a node of a group of transistors (~18 times beyond the optical resolution limit), and applied this to isolate and identify an actual fault on a defective device. While problems associated with probing with shorter wavelength lasers continue to be addressed, our approach enhances and enables the continued probing of ICs using sub-bandgap photon energies without hardware modification to existing technology at semiconductor technology nodes below 10 nm.

Date: 2022
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DOI: 10.1038/s41467-022-32724-z

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