All-to-all reconfigurability with sparse and higher-order Ising machines
Srijan Nikhar,
Sidharth Kannan,
Navid Anjum Aadit,
Shuvro Chowdhury and
Kerem Y. Camsari ()
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Srijan Nikhar: University of California
Sidharth Kannan: University of California
Navid Anjum Aadit: University of California
Shuvro Chowdhury: University of California
Kerem Y. Camsari: University of California
Nature Communications, 2024, vol. 15, issue 1, 1-11
Abstract:
Abstract Domain-specific hardware to solve computationally hard optimization problems has generated tremendous excitement. Here, we evaluate probabilistic bit (p-bit) based Ising Machines (IM) on the 3-Regular 3-Exclusive OR Satisfiability (3R3X), as a representative hard optimization problem. We first introduce a multiplexed architecture that emulates all-to-all network functionality while maintaining highly parallelized chromatic Gibbs sampling. We implement this architecture in a single Field-Programmable Gate Array (FPGA) and show that running the adaptive parallel tempering algorithm demonstrates competitive algorithmic and prefactor advantages over alternative IMs by D-Wave, Toshiba, and Fujitsu. We also implement higher-order interactions that lead to better prefactors without changing algorithmic scaling for the XORSAT problem. Even though FPGA implementations of p-bits are still not quite as fast as the best possible greedy algorithms accelerated on Graphics Processing Units (GPU), scaled magnetic versions of p-bit IMs could lead to orders of magnitude improvements over the state of the art for generic optimization.
Date: 2024
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DOI: 10.1038/s41467-024-53270-w
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