High drain field impact ionization transistors as ideal switches

Baowei Yuan, Zhibo Chen, Yingxin Chen, Chengjie Tang, Weiao Chen, Zengguang Cheng, Chunsong Zhao, Zhaozhao Hou, Qiang Zhang, Weizhuo Gan, Jiacheng Gao, Jiale Wang, Jeffrey Xu, Guangxi Hu, Zhenhua Wu, Kun Luo, Mingyan Luo, Yuanbo Zhang, Zengxing Zhang, Shisheng Xiong, Chunxiao Cong, Wenzhong Bao, Shunli Ma, Jing Wan (), Peng Zhou () and Ye Lu ()
Additional contact information
Baowei Yuan: Fudan University
Zhibo Chen: Fudan University
Yingxin Chen: Fudan University
Chengjie Tang: Fudan University
Weiao Chen: Fudan University
Zengguang Cheng: Fudan University
Chunsong Zhao: LTD.
Zhaozhao Hou: LTD.
Qiang Zhang: LTD.
Weizhuo Gan: LTD.
Jiacheng Gao: LTD.
Jiale Wang: LTD.
Jeffrey Xu: LTD.
Guangxi Hu: Fudan University
Zhenhua Wu: Chinese Academy of Sciences
Kun Luo: Chinese Academy of Sciences
Mingyan Luo: Fudan University
Yuanbo Zhang: Fudan University
Zengxing Zhang: Fudan University
Shisheng Xiong: Fudan University
Chunxiao Cong: Fudan University
Wenzhong Bao: Fudan University
Shunli Ma: Fudan University
Jing Wan: Fudan University
Peng Zhou: Fudan University
Ye Lu: Fudan University

Nature Communications, 2024, vol. 15, issue 1, 1-8

Abstract: Abstract Impact ionization effect has been demonstrated in transistors to enable sub-60 mV dec−1 subthreshold swing. However, traditionally, impact ionization in silicon devices requires a high operation voltage due to limited electrical field near the device drain, contradicting the low energy operation purpose. Here, we report a vertical subthreshold swing device composed of a graphene/silicon heterojunction drain and a silicon channel. This structure creates a low voltage avalanche impact ionization phenomenon and leads to steep switching of the silicon-based device. Experimental measurements reveal a small average subthreshold swing of 16 µV dec−1 over 6 decades of drain current and nearly hysteresis-free, and the operating voltage at which a vertical subthreshold swing occurs can be as low as 0.4 V at room temperature. Furthermore, a complementary silicon-based logic inverter is experimentally demonstrated to reach a voltage gain of 311 at a supply voltage of 2 V.

Date: 2024
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DOI: 10.1038/s41467-024-53337-8

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