High performance Si-MoS2 heterogeneous embedded DRAM

Kai Xiao, Jing Wan (), Hui Xie, Yuxuan Zhu, Tian Tian, Wei Zhang, Yingxin Chen, Jinshu Zhang, Lihui Zhou, Sheng Dai, Zihan Xu, Wenzhong Bao () and Peng Zhou ()
Additional contact information
Kai Xiao: Fudan University
Jing Wan: Fudan University
Hui Xie: Fudan University
Yuxuan Zhu: Fudan University
Tian Tian: Fudan University
Wei Zhang: Fudan University
Yingxin Chen: Fudan University
Jinshu Zhang: Fudan University
Lihui Zhou: School of Chemistry & Molecular Engineering, East China University of Science and Technology
Sheng Dai: School of Chemistry & Molecular Engineering, East China University of Science and Technology
Zihan Xu: Shenzhen Sixcarbon Technology
Wenzhong Bao: Fudan University
Peng Zhou: Fudan University

Nature Communications, 2024, vol. 15, issue 1, 1-9

Abstract: Abstract Embedded Dynamic RAM (eDRAM) has become a key solution for large-capacity cache in high-performance processors. A heterogeneous two transistor capacitorless eDRAM (2T-eDRAM) that combines silicon and molybdenum disulfide (MoS2) is reported to address the short retention issue in conventional gain cell (GC) eDRAMs meanwhile eliminate the pillar capacitor in one transistor and one capacitor (1T1C) eDRAMs. The MoS2 write transistor with low OFF current (IOFF) enables long data retention, while the Si read transistor offers high drive current and logic compatibility. This combination enhances data retention by 1000 times and sense margin by 100 times respectively compared to full Si and MoS2 counterparts. A three-dimensional (3D) design stacking MoS2 on Si is demonstrated with back-end-of-line (BEOL) process to double integration density. With 6000 s data retention, 35 μA/μm sense margin, 5 ns access speeds, 3D integration and CMOS logic compatibility, this Si-MoS2 eDRAM marks a significant advancement in memory technology.

Date: 2024
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DOI: 10.1038/s41467-024-54218-w

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