Layer ensemble averaging for fault tolerance in memristive neural networks

Osama Yousuf, Brian D. Hoskins, Karthick Ramu, Mitchell Fream, William A. Borders, Advait Madhavan, Matthew W. Daniels, Andrew Dienstfrey, Jabez J. McClelland, Martin Lueker-Boden and Gina C. Adam ()
Additional contact information
Osama Yousuf: George Washington University
Brian D. Hoskins: National Institute of Standards and Technology
Karthick Ramu: National Institute of Standards and Technology
Mitchell Fream: National Institute of Standards and Technology
William A. Borders: National Institute of Standards and Technology
Advait Madhavan: National Institute of Standards and Technology
Matthew W. Daniels: National Institute of Standards and Technology
Andrew Dienstfrey: National Institute of Standards and Technology
Jabez J. McClelland: National Institute of Standards and Technology
Martin Lueker-Boden: Western Digital Technologies
Gina C. Adam: George Washington University

Nature Communications, 2025, vol. 16, issue 1, 1-14

Abstract: Abstract Artificial neural networks have advanced due to scaling dimensions, but conventional computing struggles with inefficiencies due to memory bottlenecks. In-memory computing architectures using memristor devices offer promise but face challenges due to hardware non-idealities. This work proposes layer ensemble averaging—a hardware-oriented fault tolerance scheme for improving inference performance of non-ideal memristive neural networks programmed with pre-trained solutions. Simulations on an image classification task and hardware experiments on a continual learning problem with a custom 20,000-device prototyping platform show significant performance gains, outperforming prior methods at similar redundancy levels and overheads. For the image classification task with 20% stuck-at faults, accuracy improves from 40% to 89.6% (within 5% of baseline), and for the continual learning problem, accuracy improves from 55% to 71% (within 1% of baseline). The proposed scheme is broadly applicable to accelerators based on a variety of different non-volatile device technologies.

Date: 2025
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DOI: 10.1038/s41467-025-56319-6

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