Spin logic enabled by current vector adder
Tieyang Zhao,
Zhenyi Zheng,
Jinkai Wang,
Guowei Zhou,
Liang Liu,
Chenghang Zhou,
Qidong Xie,
Lanxin Jia,
Rui Xiao,
Qihan Zhang,
Lizhu Ren,
Shu Shi,
Tao Zeng,
Youdi Gu,
Xiaohong Xu (),
Yue Zhang () and
Jingsheng Chen ()
Additional contact information
Tieyang Zhao: National University of Singapore
Zhenyi Zheng: National University of Singapore
Jinkai Wang: Beihang University
Guowei Zhou: School of Chemistry and Materials Science of Shanxi Normal University & Key Laboratory of Magnetic Molecules and Magnetic Information Materials of Ministry of Education
Liang Liu: Shanghai Jiao Tong University
Chenghang Zhou: National University of Singapore
Qidong Xie: National University of Singapore
Lanxin Jia: National University of Singapore
Rui Xiao: National University of Singapore
Qihan Zhang: National University of Singapore
Lizhu Ren: National University of Singapore
Shu Shi: National University of Singapore
Tao Zeng: National University of Singapore
Youdi Gu: National University of Singapore
Xiaohong Xu: School of Chemistry and Materials Science of Shanxi Normal University & Key Laboratory of Magnetic Molecules and Magnetic Information Materials of Ministry of Education
Yue Zhang: Beihang University
Jingsheng Chen: National University of Singapore
Nature Communications, 2025, vol. 16, issue 1, 1-7
Abstract:
Abstract In order to advance the silicon integrated circuit technology, researchers have been searching for memory and logic devices with new physical state variables other than charge. Spin logic device that adds one degree of freedom-electron spin to charge has been considered as a promising candidate due to its low power consumption, built-in memory, and high scalability. Here, we demonstrate that a new variable – current direction on the sample can be introduced into the spin logic operation. The current direction of the sample is considered as a vector. For the various input currents along different directions, the direction of vector sum (vector adder) determines the output and therefore can enable complex logic functions. We have realized the basic Boolean logic gates including AND, OR, NAND, NOR, and even complicated IMPLY in a single device and further constructed a full adder with only 2 devices.
Date: 2025
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Persistent link: https://EconPapers.repec.org/RePEc:nat:natcom:v:16:y:2025:i:1:d:10.1038_s41467-025-58225-3
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DOI: 10.1038/s41467-025-58225-3
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