Reconfigurable binary and ternary logic devices enabling logic state modulation

Yonghyun Albert Kwon, Su Bin Park, Jaeyeon Kim, Youngjae Yoo, Seung Woo Lee () and Jeong Ho Cho ()
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Yonghyun Albert Kwon: Yonsei University
Su Bin Park: Yeungnam University
Jaeyeon Kim: Yonsei University
Youngjae Yoo: Chung-Ang University
Seung Woo Lee: Yeungnam University
Jeong Ho Cho: Yonsei University

Nature Communications, 2025, vol. 16, issue 1, 1-8

Abstract: Abstract This paper reports a reconfigurable binary–ternary transistor with a controllable voltage range and current level for the intermediate logic state. The proposed functions were demonstrated using an indium–gallium–zinc-oxide channel with a dual-gate structure incorporating two types of dielectrics (with high and low capacitances). This asymmetric dual-gate structure exhibits two key characteristics. First, the threshold voltage can be adjusted by applying a voltage to the control gate opposing the input. Second, partial depletion occurs when the input gate’s capacitance is insufficient, making the off current dependent on the control gate voltage. Two dual-gated channels were connected in series, with inputs applied to the low-capacitance gate of one channel and the high-capacitance gate of the other and the remaining gates served as control gates. This device configuration outputs three current regions: fully depleted (low), partially depleted (intermediate), and accumulated (high) channel currents, which were utilized as logic states for the ternary device. Moreover, the threshold voltage for each channel and the current from the partially depleted channel could be precisely controlled by biasing each control gate. This enables an adjustable voltage range and current level for the intermediate logic state, as well as reconfigurability between binary and ternary operations.

Date: 2025
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DOI: 10.1038/s41467-025-62116-y

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