Scalable transition metal dichalcogenide memtransistor arrays with Schottky-barrier control for energy-efficient artificial neural networks

Xiangyu Hou (), Wei Zhang, Sisheng Duan, Tengyu Jin (), Xiangrui Geng, Ming Lin, Yichen Cai, Jingyu Mao, Yizhuo Luo, Jinlong Zhu, Junhao Lin and Wei Chen ()
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Xiangyu Hou: National University of Singapore
Wei Zhang: National University of Singapore
Sisheng Duan: National University of Singapore
Tengyu Jin: Shanghai University
Xiangrui Geng: National University of Singapore
Ming Lin: Institute of Materials Research and Engineering (IMRE), Agency for Science, Technology and Research (A*STAR)
Yichen Cai: National University of Singapore
Jingyu Mao: National University of Singapore
Yizhuo Luo: National University of Singapore
Jinlong Zhu: Southern University of Science and Technology
Junhao Lin: Southern University of Science and Technology
Wei Chen: National University of Singapore

Nature Communications, 2025, vol. 16, issue 1, 1-12

Abstract: Abstract Memtransistors that integrate memristor and transistor functionalities are promising candidates for scalable, energy-efficient neuromorphic computing. However, achieving high performance in memtransistor arrays—particularly in terms of resistive switching ratio, uniformity, and scalability—remains a significant challenge for practical deployment in artificial neural networks. Here, we present scalable memtransistor arrays based on transition metal dichalcogenides (TMDCs), where the Schottky barrier is precisely controlled by modulating vacancy distribution and migration behavior. This approach enables a substantial improvement in the resistive switching ratio, reaching 105 through gate modulation. The device-to-device variation is maintained below 6.8%, and the power consumption is as low as 1 pJ per operation. These devices demonstrate high performance in artificial neural network applications, achieving greater than 98% accuracy in image recognition tasks. Furthermore, the devices exhibit remarkable scalability, with a cell size as small as 4.65 F², and can be further miniaturized by adjusting the channel size without affecting the switching performance. This work highlights the potential of TMDC-based memtransistor arrays for energy-efficient, high-performance artificial neural networks, offering a scalable solution for next-generation neuromorphic computing hardware.

Date: 2025
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DOI: 10.1038/s41467-025-64579-5

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