Advancing 2D CMOS electronics with high-performance p-type transistors

Jianfeng Jiang (), Xudong Zheng, Yifan Liu (), Lain-Jong Li, Lin Xu, Jing Kong () and Lian-Mao Peng ()
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Jianfeng Jiang: Massachusetts Institute of Technology, Research Laboratory of Electronics and Department of Electrical Engineering and Computer Science
Xudong Zheng: Massachusetts Institute of Technology, Research Laboratory of Electronics and Department of Electrical Engineering and Computer Science
Yifan Liu: Peking University, Key Laboratory for the Physics and Chemistry of Nanodevices and Center for Carbon-based Electronics, School of Electronics
Lain-Jong Li: National University of Singapore, Department of Materials Science and Engineering
Lin Xu: the University of California, Electrical and Computer Engineering
Jing Kong: Massachusetts Institute of Technology, Research Laboratory of Electronics and Department of Electrical Engineering and Computer Science
Lian-Mao Peng: Peking University, Key Laboratory for the Physics and Chemistry of Nanodevices and Center for Carbon-based Electronics, School of Electronics

Nature Communications, 2025, vol. 16, issue 1, 1-7

Abstract: Two-dimensional (2D) semiconductors have emerged as promising candidates for enabling complementary metal-oxide-semiconductor (CMOS) technology in post-silicon electronics. However, a significant performance gap between 2D p-type and n-type transistors hampers their immediate industrial application. In this Comment, we discuss recent advances in high-performance 2D p-type transistors, outline a roadmap for their potential development, and propose benchmark performance metrics to guide future progress.

Date: 2025
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DOI: 10.1038/s41467-025-66263-0

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