One-by-one trap activation in silicon nanowire transistors

N. Clément (), K. Nishiguchi (), A. Fujiwara and D. Vuillaume
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N. Clément: Institute of Electronics, Microelectronics and Nanotechnology, CNRS, University of Lille, Avenue Poincaré, Villeneuve d'Ascq 59652, France.
K. Nishiguchi: NTT Basic Research Laboratories, NTT Corporation, 3-1, Morinosato Wakamiyia, Atsugi-shi 243-0198, Japan.
A. Fujiwara: NTT Basic Research Laboratories, NTT Corporation, 3-1, Morinosato Wakamiyia, Atsugi-shi 243-0198, Japan.
D. Vuillaume: Institute of Electronics, Microelectronics and Nanotechnology, CNRS, University of Lille, Avenue Poincaré, Villeneuve d'Ascq 59652, France.

Nature Communications, 2010, vol. 1, issue 1, 1-8

Abstract: Abstract Flicker or 1/f noise in metal-oxide-semiconductor field-effect transistors (MOSFETs) has been identified as the main source of noise at low frequency. It often originates from an ensemble of a huge number of charges becoming trapped and de-trapped. However, as a deviation from the well-known model of 1/f noise is observed for nanoscale MOSFETs, a new model is required. Here, we report the observation of one-by-one trap activation controlled by the gate voltage in a nanowire MOSFET and propose a new low-frequency-noise theory for nanoscale FETs. We show that the Coulomb repulsion between electronically charged trap sites prevents the activation of several traps simultaneously. This effect induces a noise reduction of more than one order of magnitude. It decreases when the electron density in the channel is increased due to the electrical screening of traps. These findings are technologically useful for any FET with a short and narrow channel.

Date: 2010
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DOI: 10.1038/ncomms1092

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