Cascaded logic gates in nanophotonic plasmon networks

Hong Wei, Zhuoxian Wang, Xiaorui Tian, Mikael Käll and Hongxing Xu ()
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Hong Wei: Beijing National Laboratory for Condensed Matter Physics and Institute of Physics, Chinese Academy of Sciences, Box 603-146, Beijing 100190, China.
Zhuoxian Wang: Beijing National Laboratory for Condensed Matter Physics and Institute of Physics, Chinese Academy of Sciences, Box 603-146, Beijing 100190, China.
Xiaorui Tian: Beijing National Laboratory for Condensed Matter Physics and Institute of Physics, Chinese Academy of Sciences, Box 603-146, Beijing 100190, China.
Mikael Käll: Chalmers University of Technology
Hongxing Xu: Beijing National Laboratory for Condensed Matter Physics and Institute of Physics, Chinese Academy of Sciences, Box 603-146, Beijing 100190, China.

Nature Communications, 2011, vol. 2, issue 1, 1-5

Abstract: Abstract Optical computing has been pursued for decades as a potential strategy for advancing beyond the fundamental performance limitations of semiconductor-based electronic devices, but feasible on-chip integrated logic units and cascade devices have not been reported. Here we demonstrate that a plasmonic binary NOR gate, a 'universal logic gate', can be realized through cascaded OR and NOT gates in four-terminal plasmonic nanowire networks. This finding provides a path for the development of novel nanophotonic on-chip processor architectures for future optical computing technologies.

Date: 2011
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DOI: 10.1038/ncomms1388

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