Fabrication and operation of a two-dimensional ion-trap lattice on a high-voltage microchip

R. C. Sterling, H. Rattanasonti, S. Weidt, K. Lake, P. Srinivasan, S. C. Webster, M. Kraft and W. K. Hensinger ()
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R. C. Sterling: University of Sussex
H. Rattanasonti: School of Electronics and Computer Science, University of Southampton
S. Weidt: University of Sussex
K. Lake: University of Sussex
P. Srinivasan: School of Electronics and Computer Science, University of Southampton
S. C. Webster: University of Sussex
M. Kraft: School of Electronics and Computer Science, University of Southampton
W. K. Hensinger: University of Sussex

Nature Communications, 2014, vol. 5, issue 1, 1-6

Abstract: Abstract Microfabricated ion traps are a major advancement towards scalable quantum computing with trapped ions. The development of more versatile ion-trap designs, in which tailored arrays of ions are positioned in two dimensions above a microfabricated surface, will lead to applications in fields as varied as quantum simulation, metrology and atom–ion interactions. Current surface ion traps often have low trap depths and high heating rates, because of the size of the voltages that can be applied to them, limiting the fidelity of quantum gates. Here we report on a fabrication process that allows for the application of very high voltages to microfabricated devices in general and use this advance to fabricate a two-dimensional ion-trap lattice on a microchip. Our microfabricated architecture allows for reliable trapping of two-dimensional ion lattices, long ion lifetimes, rudimentary shuttling between lattice sites and the ability to deterministically introduce defects into the ion lattice.

Date: 2014
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DOI: 10.1038/ncomms4637

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