A low-cost DAC BIST structure using a resistor loop

Jaewon Jang, Heetae Kim and Sungho Kang

PLOS ONE, 2017, vol. 12, issue 2, 1-13

Abstract: This paper proposes a new DAC BIST (digital-to-analog converter built-in self-test) structure using a resistor loop known as a DDEM ADC (deterministic dynamic element matching analog-to-digital converter). Methods for both switch reduction and switch effect reduction are proposed for solving problems related to area overhead and accuracy of the conventional DAC BIST. The proposed BIST modifies the length of each resistor in the resistor loop via a merging operation and reduces the number of switches and resistors. In addition, the effect of switches is mitigated using the proposed switch effect reduction method. The accuracy of the proposed BIST is demonstrated by the reduction in the switch effect. The experimental results show that the proposed BIST reduces resource usages and the mismatch error caused by the switches.

Date: 2017
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Persistent link: https://EconPapers.repec.org/RePEc:plo:pone00:0172331

DOI: 10.1371/journal.pone.0172331

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