FPGA-Based Design of an Intelligent On-Chip Sensor Network Monitoring and Control Using Dynamically Reconfigurable Autonomous Sensor Agents

Sani Abba and Jeong-A Lee

International Journal of Distributed Sensor Networks, 2016, vol. 12, issue 2, 4246596

Abstract: This paper proposes different low-level microarchitectural designs and frameworks for real-time monitoring and efficient control of on-chip sensor network for field programmable gate arrays (FPGAs). The main goals are to design low power, low-cost, and highly accurate monitoring and control mechanism using autonomous sensor agents and to dynamically reconfigure control of on-chip sensor networks by FPGAs. By collecting dynamic and real-time monitoring parameters such as voltage and temperature, the system becomes self-aware and is able to improve the utilization of FPGA resources and power consumption. The FPGA synthesis, place and route, and implementation were performed for the proposed design. The results after synthesis and implementation show a significant low usage of FPGA logic resources and efficient power consumption of all on-chip sensor components compared with previous approaches. Furthermore, the experimental results from the FPGA-measured on-chip sensor readings show high precision and accuracy in the measured voltage and temperature. Setting the dynamic reconfiguration refresh time at 1000 ms produces highly accurate FPGA-measured on-chip sensor readings compared with those at 100 and 500 ms. The proposed design technique and framework will assist network engineers and system designers by providing flexible and efficient real-time monitoring and control design of large and complex on-chip sensor networks and remote-sensing applications.

Date: 2016
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Persistent link: https://EconPapers.repec.org/RePEc:sae:intdis:v:12:y:2016:i:2:p:4246596

DOI: 10.1155/2016/4246596

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