Novel architecture of FFT implementation for 5G module using machine learning algorithms

Nagarjuna Malladhi (), K. Narsimha Reddy () and Rajeev Ratna Vallabhuni ()
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Nagarjuna Malladhi: Vardhaman College of Engineering
K. Narsimha Reddy: Sreyas Institute of Engineering and Technology
Rajeev Ratna Vallabhuni: Bayview Asset Management, LLC

International Journal of System Assurance Engineering and Management, 2023, vol. 14, issue 6, No 28, 2387-2394

Abstract: Abstract This proposed work combines R2B, R4B, and R8B using signal delay feedback FFT architecture. R2B SDF FFT architecture has complex and large computations, and many stages are being used. To overcome this problem, Radix-4 and Radix-8 FFT are built to increase efficiency and decrease computational steps to incorporate in DUC and DDC filters and OFDM modules of 5G based modules. Signal delay feedback FFT architecture has stages that can have one clock per cycle. Each phase consists of a butterfly-type diagram in which the twiddle factors and rotators are used. In the proposed joined R2B, R4B, and R8B combined FFT, 5 phases of R2B FFT have been used with standard machine learning algorithms. When combined with complex R2B FFT, the combined R2B, R4B, and R8B FFT are less computational than the current technique. In the proposed method, the Xilinx tool is used to execute the introduced model.

Keywords: CORDIC; DDC; DUC; R2B; R4B; R8B; Signal delay feedback (search for similar items in EconPapers)
Date: 2023
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Citations: View citations in EconPapers (1)

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DOI: 10.1007/s13198-023-02087-9

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