Design of interfaces between high speed data converters and high performance FPGAs for software defined radio applications

Mahadevan Balakrishnan (), Khalim Amjad Meerja (), Kishore Kumar Gundugonti and Sri Rama Krishna Kalva
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Mahadevan Balakrishnan: Qualcomm
Khalim Amjad Meerja: V R Siddhartha Engineering College
Kishore Kumar Gundugonti: V R Siddhartha Engineering College
Sri Rama Krishna Kalva: V R Siddhartha Engineering College

Telecommunication Systems: Modelling, Analysis, Design and Management, 2019, vol. 71, issue 4, No 6, 614 pages

Abstract: Abstract Software defined radio (SDR) is a vast and emerging field that requires the design of various technologies such as antenna, RF, IF, and digital baseband subsystems. Among all these technologies, data converters that convert signals between analog and digital domains are highly crucial. On the other hand field programmable gate arrays (FPGAs) based platforms are being preferred for evaluating and implementing the digital communication concepts due to their programmability and reconfigurability. As a result they are well suited for the design of SDR technology. In this research work, we develop a platform where high-speed data converters are interfaced with high performance FPGAs. Interfaces are designed for analog-to-digital convertors (ADC) and digital-to-analog convertors (DAC) to communicate with FPGAs. For the interface design between ADC and FPGA, a double data rate and a low voltage differential signalling based serial output is adopted. And, for the interface design between DAC and other FPGA, parallel complementary metal oxide semiconductor outputs are used. To reconfigure the modes and parameters of the data convertors, serial peripheral interface data controllers have been designed. We have through simulations evaluated the performance of our designed interfaces between data convertors and FPGAs.

Keywords: ADC; DAC; SDR; FPGA; LVDS; CMOS; SFDR (search for similar items in EconPapers)
Date: 2019
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DOI: 10.1007/s11235-018-00539-3

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