High Power Ku-Band T/R and SP4T Switches in SOI CMOS
Doojung Kim and
Byung-Wook Min
Journal of Electromagnetic Waves and Applications, 2016, vol. 30, issue 6, 728-739
Abstract:
This paper presents silicon-on-insulation (SOI) CMOS T/R and SP4T switches with high-power handling capability. The CMOS transistors are stacked and their sources and drains are biased for the high-power handling capability. The TQ trench of 0.18-μ$ \upmu $m SOI CMOS process is properly placed to improve the substrate isolation between transistors. For the T/R switch, the measured insertion loss of Tx and Rx modes are $ > $24 dB in the same frequency band. To author’s knowledge, this T/R switch shows the highest input 1-dB compression point of 34 dBm in Ku-band CMOS switches. The SP4T switch operates in DC-18 GHz, and the measured insertion loss and isolation are $ > $19.5 dB, respectively, with the return loss of
Date: 2016
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DOI: 10.1080/09205071.2016.1145077
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