EconPapers    
Economics at your fingertips  
 

Groebner Bases Based Verification Solution for SystemVerilog Concurrent Assertions

Ning Zhou, Xinyan Gao, Jinzhao Wu, Jianchao Wei and Dakui Li

Journal of Applied Mathematics, 2014, vol. 2014, issue 1

Abstract: We introduce an approach exploiting the power of polynomial ring algebra to perform SystemVerilog assertion verification over digital circuit systems. This method is based on Groebner bases theory and sequential properties checking. We define a constrained subset of SVAs so that an efficient polynomial modeling mechanism for both circuit descriptions and assertions can be applied. We present an algorithm framework based on the algebraic representations using Groebner bases for concurrent SVAs checking. Case studies show that computer algebra can provide canonical symbolic representations for both assertions and circuit designs and can act as a novel solver engine from the viewpoint of symbolic computation.

Date: 2014
References: Add references at CitEc
Citations:

Downloads: (external link)
https://doi.org/10.1155/2014/194574

Related works:
This item may be available elsewhere in EconPapers: Search for items with the same title.

Export reference: BibTeX RIS (EndNote, ProCite, RefMan) HTML/Text

Persistent link: https://EconPapers.repec.org/RePEc:wly:jnljam:v:2014:y:2014:i:1:n:194574

Access Statistics for this article

More articles in Journal of Applied Mathematics from John Wiley & Sons
Bibliographic data for series maintained by Wiley Content Delivery ().

 
Page updated 2025-03-22
Handle: RePEc:wly:jnljam:v:2014:y:2014:i:1:n:194574