SysTest: Improving the verification, validation, and testing process— Assessing six industrial pilot projects

Markus Hoppe, Avner Engel and Shalom Shachar

Systems Engineering, 2007, vol. 10, issue 4, 323-347

Abstract: The overall objective of the SysTest project was to develop a generic Verification, Validation, and Testing (VVT) methodology guidelines and an economic VVT process model in order to realize improved product quality at reduced cost and time to market. Six real‐life pilot projects were conducted by the SysTest industrial partners in order to assess the effectiveness of the SysTest products. The pilot projects represented diverse industrial segments namely, aircrafts avionics and jet engines, automobile engine castings and embedded software, liquid food packaging manufacturing, and steel production. In this paper, we demonstrate that: (1) The SysTest products are generic and applicable for different industries and (2) a clear trend was established: Namely, the application of the SysTest products improves the process and product quality. In the case of the SysTest pilot project, the average project cost saving was 7.6% with standard deviation of 14.8%. © 2007 Wiley Periodicals, Inc. Syst Eng 10: 323– 347, 2007

Date: 2007
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