Neural Network Circuits and Parallel Implementations

Ke-Lin Du () and M. N. S. Swamy
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Ke-Lin Du: Concordia University, Department of Electrical and Computer Engineering
M. N. S. Swamy: Concordia University, Department of Electrical and Computer Engineering

Chapter Chapter 28 in Neural Networks and Statistical Learning, 2019, pp 829-851 from Springer

Abstract: Abstract Hardware and parallel implementations can substantially speed up machine learning algorithms to extend their widespread applications. In this chapter, we first introduce various circuit realizations for popular neural network learning methods. We then introduce their parallel implementations on graphic processing units (GPUs), systolic arrays of processors, and parallel computers.

Date: 2019
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DOI: 10.1007/978-1-4471-7452-3_28

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