Counter Inspection Toolkit: Making Sense Out of Hardware Performance Events

Anthony Danalis (), Heike Jagode (), Hanumantharayappa (), Sangamesh Ragate () and Jack Dongarra ()
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Anthony Danalis: University of Tennessee, Innovative Computing Laboratory
Heike Jagode: University of Tennessee, Innovative Computing Laboratory
Hanumantharayappa: Mathworks
Sangamesh Ragate: Cerebras Systems
Jack Dongarra: University of Tennessee, Innovative Computing Laboratory

A chapter in Tools for High Performance Computing 2017, 2019, pp 17-37 from Springer

Abstract: Abstract Hardware counters play an essential role in understanding the behavior of performance-critical applications, and inform any effort to identify opportunities for performance optimization. However, because modern hardware is becoming increasingly complex, the number of counters that are offered by the vendors increases and, in some cases, so does their complexity. In this paper we present a toolkit that aims to assist application developers invested in performance analysis by automatically categorizing and disambiguating performance counters. We present and discuss the set of microbenchmarks and analyses that we developed as part of our toolkit. We explain why they work and discuss the non-obvious reasons why some of our early benchmarks and analyses did not work in an effort to share with the rest of the community the wisdom we acquired from negative results.

Date: 2019
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DOI: 10.1007/978-3-030-11987-4_2

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